Personal tools
You are here: Home CG seminar Fall 2017 Solid Modelling for VLSI Design
« July 2017 »
July
SuMoTuWeThFrSa
1
2345678
9101112131415
16171819202122
23242526272829
3031
Log in


Forgot your password?
 

Solid Modelling for VLSI Design

Wednesday, January 4th, 2017 16:10

Schreiber 309

underline

Solid Modelling for VLSI Design

Elisha Sacks, Purdue University

Abstract:

Solid modelling is a core technology in VLSI process and device modelling. Intel
has found that commercial software is not robust: it fails unpredictably and
egregiously. We are exploring the applicability of our adaptive controlled
perturbation (ACP) robustness strategy. I will present a combined solution to
two problems that are important to Intel and are outstanding in computational
geometry: geometric rounding and simplification (small feature removal) of
polyhedra.

Joint work with Victor Milenkovic, University of Miami.

Sacks is a professor of computer science at Purdue University. He received his
PhD from MIT in 1988 and the supervision of Sussman and Patil. He researched
algorithms for kinematic design of mechanisms with Joskowicz of Hebrew
University. This work culminated in a consulting contract with Ford Motors that
introduced him to the robustness problem in computational geometry. His other
recent research involves geometric algorithms for computer graphics.



Document Actions